The present invention relates to a metal-oxide-semiconductor (MOS) device comprising a plurality of semiconductor units on one semiconductor substrate capable of operating at high current levels.
FIG. 2 is a sectional view of a unit of power MOS field effect transistor (MOSFET). The power MOSFET includes a p.sup.+ base layer with high impurity concentration 21, a square p base layer 22, a square, annular n.sup.+ source layer 3, a gate oxide film 4, a gate electrode 5, an insulation film 41, and a source electrode 6 on one surface of an n-type silicon substrate 1. The gate electrode 5 may be, for example, of polycrystal silicon. An n.sup.+ layer 7 and a drain electrode 8 are deposed on the other surface of the silicon substrate 1. The silicon substrate 1 operates as a drain region.
As shown in FIG. 2, a channel-forming region 23 lies between the n.sup.+ source layer 3 and the drain region 1. This channel region 23 allows current to flow between the source electrode 6, which is in contact with the n.sup.+ source layer 3 and with the p.sup.30 base layer 21, and the drain electrode 8. The gate electrode 5 also lies above n.sup.+ source layer 3 and drain region 1. An insulation film 41 separates the gate electrode 5 from the source electrode 6 which is in contact with the n.sup.+ source layer 3 and with the p.sup.30 base layer 21. Such a power MOSFET yields increased current capacity when a plurality of square-type units are formed on the same substrate and are interconnected in parallel.
If a positive voltage relative to the source electrode 6 is applied to the gate electrode 5 of the unit, the channel region 23 of the p base layer 22 becomes inverted and forms a n channel. In this case, electrons are injected into the drain region 1 from the n.sup.+ source layer 3 through the channel region 23 when the source electrode 6 and the drain electrode 8 are set in a conductive condition. If a negative voltage relative to the source electrode 6 is applied to the gate electrode 5 of the unit, the conductive state is inverted when the source electrode 6 and the drain electrode 8 are set in a conductive condition. Thus, the unit can operate as a switching element.
A MOS device comprising a plurality of units shown in FIG. 2 may be used in electrical apparatus. The apparatus may generate a spike voltage or a high voltage rising rate (dv/dt) having a high energy due to an inductive load such as inductance between wiring. This electrical stress often causes the MOSFET to break down.
FIG. 3 illustrates a breakdown phenomenon. The power MOSFET breaks down when a voltage exceeding the breakdown voltage of the power MOSFET is applied and the power MOSFET cannot absorb such energy During breakdown, avalanche multiplication in a depletion layer 9 indicated by a broken line in FIG. 3 generates a current. This avalanche current comprises a hole current J.sub.p flowing into the source electrode 6 and an electron current flowing into the drain electrode 8. Since the hole current J.sub.p flows through a diffusion resistance R.sub.b under the n.sup.+ source layer 3, a voltage difference of (J.sub.p .times.R.sub.b) exists in an area under the n.sup.30 source layer 3. If this voltage difference exceeds a diffusion voltage of approximately 0.6 volts between the n.sup.+ source layer 3 and the p base layer 22, electrons are injected from the n.sup.+ source layer 3, and a parasitic npn transistor comprising source layer 3, p base layer 22, and n.sup.- drain region 1 turns on. The result under these circumstances is a gate uncontrollable condition which leads to breakdown.
In order to increase an avalanche current capability, concentrations and diffusion depths of the p.sup.30 base layer 21 and of the p base layer 22 should be increased. However, these measures also cause an on resistance R.sub.on, which is the main characteristic of the power MOSFET, to increase and a breakdown voltage V.sub.dss to decrease
As shown in FIG. 4 and in FIG. 5, the on resistance R.sub.on is a function of an interval L.sub.g between the p base layers 22 of adjacent units. Line 51 shows R.sub.on as a function of L.sub.g when V.sub.Dss is 500 V. Line 52 shows R.sub.on as a function of L.sub.g when V.sub.Dss is 100 V. Referring to FIG. 5, a larger L.sub.g is required to reduce R.sub.on in the power MOSFET having a breakdown voltage of 400 volts or higher.
When L.sub.g is small, FIG. 4 shows that the depletion layers 9 of adjacent units are coupled. By widening L.sub.g, a depletion layer volume under the gate electrode 5 increases and a field intensity in the p base layer 22 increases due to separation of the depletion layers of the units and to small curvature of the depletion layer. As a result, the avalanche hole current J.sub.p flowing under the n.sup.+ source layer 3 increases significantly, and the turn-on phenomenon of the parasitic bipolar transistor accelerates. A unit then readily breaks down. Breakdown occurs at weak areas of uncertain units which are among several tens of thousands of units integrated on one semiconductor substrate. It is difficult to fabricate many units which operate in the same way and are equally reliable under severe electrical stress.
Accordingly, it is an object of the present invention to solve the above-described problems and to provide a metal-oxide-semiconductor device capable of operating at higher current levels or at increased current capacity comprising a plurality of units, each having a higher avalanche current capability without resulting in an increase of R.sub.on and in a decrease of V.sub.Dss. That is, each unit has improved resistance to breakdown under electrical stress.